/******************************************************************************
 ** File Name:      pinmap.h                                                  *
 ** Author:         Richard.Yang                                              *
 ** DATE:           03/08/2004                                                *
 ** Copyright:      2004 Spreatrum, Incoporated. All Rights Reserved.         *
 ** Description:    This file defines the structure of pin map.               *
 ******************************************************************************

 ******************************************************************************
 **                        Edit History                                       *
 ** ------------------------------------------------------------------------- *
 ** DATE           NAME             DESCRIPTION                               *
 ** 03/08/2004     Richard.Yang     Create.                                   *
 ******************************************************************************/

#ifndef _PINMAP_H_
#define _PINMAP_H_

#include <linux/types.h>
#include "sprd_reg.h"
#include "adi.h"

typedef struct {
	uint32_t reg;
	uint32_t val;
} pinmap_t;
int pin_init(void);
//int pin_init(pinmap_t * pinmap);

#define CTL_PIN_BASE			(SPRD_PIN_PHYS)

/* registers definitions for controller CTL_PIN */
#define REG_PIN_CTRL0                   ( 0x0000 )
#define REG_PIN_CTRL1                   ( 0x0004 )
#define REG_PIN_CTRL2                   ( 0x0008 )
#define REG_PIN_CTRL3                   ( 0x000c )
#define REG_PIN_CTRL4                   ( 0x0010 )
#define REG_PIN_CTRL5                   ( 0x0014 )
#define REG_PIN_CTRL6                   ( 0x0018 )
#define REG_PIN_CTRL7                   ( 0x001c )

/* registers definitions for controller CTL_PIN */
#define  REG_PIN_RFCTL20             	( 0x0020 )
#define  REG_PIN_RFCTL21             	( 0x0024 )
#define  REG_PIN_RFCTL30             	( 0x0028 )
#define  REG_PIN_RFCTL31             	( 0x002c )
#define  REG_PIN_RFCTL32             	( 0x0030 )
#define  REG_PIN_RFCTL33             	( 0x0034 )
#define  REG_PIN_RFCTL34             	( 0x0038 )
#define  REG_PIN_RFCTL35             	( 0x003c )
#define  REG_PIN_RFCTL36             	( 0x0040 )
#define  REG_PIN_RFCTL37             	( 0x0044 )
#define  REG_PIN_RFCTL22             	( 0x0048 )
#define  REG_PIN_GPIO164             	( 0x004c )
#define  REG_PIN_GPIO165             	( 0x0050 )
#define  REG_PIN_RFCTL25             	( 0x0054 )
#define  REG_PIN_RFCTL26             	( 0x0058 )
#define  REG_PIN_RFCTL27             	( 0x005c )
#define  REG_PIN_RFCTL28             	( 0x0060 )
#define  REG_PIN_RFCTL29             	( 0x0064 )
#define  REG_PIN_SCL2                	( 0x0068 )
#define  REG_PIN_SDA2                	( 0x006c )
#define  REG_PIN_MTCK_ARM            	( 0x0070 )
#define  REG_PIN_MTMS_ARM            	( 0x0074 )
#define  REG_PIN_XTL_EN0             	( 0x0078 )
#define  REG_PIN_PTEST               	( 0x007c )
#define  REG_PIN_AUD_DAD1            	( 0x0080 )
#define  REG_PIN_AUD_ADD0            	( 0x0084 )
#define  REG_PIN_AUD_ADSYNC          	( 0x0088 )
#define  REG_PIN_AUD_SCLK            	( 0x008c )
#define  REG_PIN_CHIP_SLEEP          	( 0x0090 )
#define  REG_PIN_CLK_32K             	( 0x0094 )
#define  REG_PIN_DCDC_ARM_EN         	( 0x0098 )
#define  REG_PIN_EXT_RST_B           	( 0x009c )
#define  REG_PIN_ADI_D               	( 0x00a0 )
#define  REG_PIN_ADI_SCLK            	( 0x00a4 )
#define  REG_PIN_XTL_EN1             	( 0x00a8 )
#define  REG_PIN_ANA_INT             	( 0x00ac )
#define  REG_PIN_AUD_DAD0            	( 0x00b0 )
#define  REG_PIN_AUD_DASYNC          	( 0x00b4 )
#define  REG_PIN_LCM_RSTN            	( 0x00b8 )
#define  REG_PIN_DSI_TE              	( 0x00bc )
#define  REG_PIN_PWMA                	( 0x00c0 )
#define  REG_PIN_EXTINT0             	( 0x00c4 )
#define  REG_PIN_EXTINT1             	( 0x00c8 )
#define  REG_PIN_SDA1                	( 0x00cc )
#define  REG_PIN_SCL1                	( 0x00d0 )
#define  REG_PIN_SIMCLK2             	( 0x00d4 )
#define  REG_PIN_SIMDA2              	( 0x00d8 )
#define  REG_PIN_SIMRST2             	( 0x00dc )
#define  REG_PIN_SIMCLK1             	( 0x00e0 )
#define  REG_PIN_SIMDA1              	( 0x00e4 )
#define  REG_PIN_SIMRST1             	( 0x00e8 )
#define  REG_PIN_SIMCLK0             	( 0x00ec )
#define  REG_PIN_SIMDA0              	( 0x00f0 )
#define  REG_PIN_SIMRST0             	( 0x00f4 )
#define  REG_PIN_SD2_CMD             	( 0x00f8 )
#define  REG_PIN_SD2_D0              	( 0x00fc )
#define  REG_PIN_SD2_D1              	( 0x0100 )
#define  REG_PIN_SD2_CLK             	( 0x0104 )
#define  REG_PIN_SD2_D2              	( 0x0108 )
#define  REG_PIN_SD2_D3              	( 0x010c )
#define  REG_PIN_SD0_D3              	( 0x0110 )
#define  REG_PIN_SD0_D2              	( 0x0114 )
#define  REG_PIN_SD0_CMD             	( 0x0118 )
#define  REG_PIN_SD0_D0              	( 0x011c )
#define  REG_PIN_SD0_D1              	( 0x0120 )
#define  REG_PIN_SD0_CLK             	( 0x0124 )
#define  REG_PIN_EMMC_CMD            	( 0x012c )
#define  REG_PIN_EMMC_D6             	( 0x0130 )
#define  REG_PIN_EMMC_D7             	( 0x0134 )
#define  REG_PIN_EMMC_CLK            	( 0x0138 )
#define  REG_PIN_EMMC_D5             	( 0x013c )
#define  REG_PIN_EMMC_D4             	( 0x0140 )
#define  REG_PIN_EMMC_DS             	( 0x0144 )
#define  REG_PIN_EMMC_D3             	( 0x014c )
#define  REG_PIN_EMMC_RST            	( 0x0150 )
#define  REG_PIN_EMMC_D1             	( 0x0154 )
#define  REG_PIN_EMMC_D2             	( 0x0158 )
#define  REG_PIN_EMMC_D0             	( 0x015c )
#define  REG_PIN_IIS0DI              	( 0x0160 )
#define  REG_PIN_IIS0DO              	( 0x0164 )
#define  REG_PIN_IIS0CLK             	( 0x0168 )
#define  REG_PIN_IIS0LRCK            	( 0x016c )
#define  REG_PIN_SD1_CLK             	( 0x0170 )
#define  REG_PIN_SD1_CMD             	( 0x0174 )
#define  REG_PIN_SD1_D0              	( 0x0178 )
#define  REG_PIN_SD1_D1              	( 0x017c )
#define  REG_PIN_SD1_D2              	( 0x0180 )
#define  REG_PIN_SD1_D3              	( 0x0184 )
#define  REG_PIN_CLK_AUX0            	( 0x0188 )
#define  REG_PIN_WIFI_COEXIST        	( 0x018c )
#define  REG_PIN_BEIDOU_COEXIST      	( 0x0190 )
#define  REG_PIN_U3TXD               	( 0x0194 )
#define  REG_PIN_U3RXD               	( 0x0198 )
#define  REG_PIN_U3CTS               	( 0x019c )
#define  REG_PIN_U3RTS               	( 0x01a0 )
#define  REG_PIN_U0TXD               	( 0x01a4 )
#define  REG_PIN_U0RXD               	( 0x01a8 )
#define  REG_PIN_U0CTS               	( 0x01ac )
#define  REG_PIN_U0RTS               	( 0x01b0 )
#define  REG_PIN_IIS1DI              	( 0x01b4 )
#define  REG_PIN_IIS1DO              	( 0x01b8 )
#define  REG_PIN_IIS1CLK             	( 0x01bc )
#define  REG_PIN_IIS1LRCK            	( 0x01c0 )
#define  REG_PIN_SPI0_CSN            	( 0x01c4 )
#define  REG_PIN_SPI0_DO             	( 0x01c8 )
#define  REG_PIN_SPI0_DI             	( 0x01cc )
#define  REG_PIN_SPI0_CLK            	( 0x01d0 )
#define  REG_PIN_U2TXD               	( 0x01d4 )
#define  REG_PIN_U2RXD               	( 0x01d8 )
#define  REG_PIN_U4TXD               	( 0x01dc )
#define  REG_PIN_U4RXD               	( 0x01e0 )
#define  REG_PIN_CMMCLK1             	( 0x01e4 )
#define  REG_PIN_CMRST1              	( 0x01e8 )
#define  REG_PIN_CMMCLK0             	( 0x01ec )
#define  REG_PIN_CMRST0              	( 0x01f0 )
#define  REG_PIN_CMPD0               	( 0x01f4 )
#define  REG_PIN_CMPD1               	( 0x01f8 )
#define  REG_PIN_SCL0                	( 0x01fc )
#define  REG_PIN_SDA0                	( 0x0200 )
#define  REG_PIN_SDA6                	( 0x0204 )
#define  REG_PIN_SCL6                	( 0x0208 )
#define  REG_PIN_U1TXD               	( 0x020c )
#define  REG_PIN_U1RXD               	( 0x0210 )
#define  REG_PIN_KEYOUT0             	( 0x0214 )
#define  REG_PIN_KEYOUT1             	( 0x0218 )
#define  REG_PIN_KEYOUT2             	( 0x021c )
#define  REG_PIN_KEYIN0              	( 0x0220 )
#define  REG_PIN_KEYIN1              	( 0x0224 )
#define  REG_PIN_KEYIN2              	( 0x0228 )
#define  REG_PIN_IIS3DI              	( 0x022c )
#define  REG_PIN_IIS3DO              	( 0x0230 )
#define  REG_PIN_IIS3CLK             	( 0x0234 )
#define  REG_PIN_IIS3LRCK            	( 0x0238 )
#define  REG_PIN_RFCTL0              	( 0x023c )
#define  REG_PIN_RFCTL1              	( 0x0240 )
#define  REG_PIN_RFCTL10             	( 0x0244 )
#define  REG_PIN_RFCTL11             	( 0x0248 )
#define  REG_PIN_RFCTL12             	( 0x024c )
#define  REG_PIN_RFCTL13             	( 0x0250 )
#define  REG_PIN_RFCTL14             	( 0x0254 )
#define  REG_PIN_RFCTL15             	( 0x0258 )
#define  REG_PIN_RFCTL16             	( 0x025c )
#define  REG_PIN_RFCTL17             	( 0x0260 )
#define  REG_PIN_RFCTL18             	( 0x0264 )
#define  REG_PIN_RFCTL19             	( 0x0268 )
#define  REG_PIN_RFCTL2              	( 0x026c )
#define  REG_PIN_EXTINT5             	( 0x0270 )
#define  REG_PIN_EXTINT6             	( 0x0274 )
#define  REG_PIN_EXTINT7             	( 0x0278 )
#define  REG_PIN_GPIO30              	( 0x027c )
#define  REG_PIN_GPIO31              	( 0x0280 )
#define  REG_PIN_GPIO32              	( 0x0284 )
#define  REG_PIN_GPIO33              	( 0x0288 )
#define  REG_PIN_GPIO34              	( 0x028c )
#define  REG_PIN_RFCTL3              	( 0x0290 )
#define  REG_PIN_RFCTL4              	( 0x0294 )
#define  REG_PIN_RFCTL5              	( 0x0298 )
#define  REG_PIN_RFCTL6              	( 0x029c )
#define  REG_PIN_RFCTL7              	( 0x02a0 )
#define  REG_PIN_GPIO15              	( 0x02a4 )
#define  REG_PIN_GPIO16              	( 0x02a8 )
#define  REG_PIN_RFFE0_SCK0          	( 0x02ac )
#define  REG_PIN_GPIO38              	( 0x02b0 )
#define  REG_PIN_RFFE0_SDA0          	( 0x02b4 )
#define  REG_PIN_GPIO39              	( 0x02b8 )
#define  REG_PIN_RFFE1_SCK0          	( 0x02bc )
#define  REG_PIN_GPIO181             	( 0x02c0 )
#define  REG_PIN_RFFE1_SDA0          	( 0x02c4 )
#define  REG_PIN_GPIO182             	( 0x02c8 )
#define  REG_PIN_RF_LVDS0_ADC_ON     	( 0x02cc )
#define  REG_PIN_RF_LVDS0_DAC_ON     	( 0x02d0 )
#define  REG_PIN_RFSCK0              	( 0x02d4 )
#define  REG_PIN_RFSDA0              	( 0x02d8 )
#define  REG_PIN_RFSEN0              	( 0x02dc )
#define  REG_PIN_RF_LVDS1_ADC_ON     	( 0x02e0 )
#define  REG_PIN_RF_LVDS1_DAC_ON     	( 0x02e4 )
#define  REG_PIN_RFSCK1              	( 0x02e8 )
#define  REG_PIN_RFSDA1              	( 0x02ec )
#define  REG_PIN_RFSEN1              	( 0x02f0 )
#define  REG_PIN_RFCTL38             	( 0x02f4 )
#define  REG_PIN_RFCTL39             	( 0x02f8 )

/* registers definitions for controller CTL_PIN MISC_OFFSET */
#define  REG_PIN_RFCTL20_MISC             	( 0x4020 )
#define  REG_PIN_RFCTL21_MISC             	( 0x4024 )
#define  REG_PIN_RFCTL30_MISC             	( 0x4028 )
#define  REG_PIN_RFCTL31_MISC             	( 0x402c )
#define  REG_PIN_RFCTL32_MISC             	( 0x4030 )
#define  REG_PIN_RFCTL33_MISC             	( 0x4034 )
#define  REG_PIN_RFCTL34_MISC             	( 0x4038 )
#define  REG_PIN_RFCTL35_MISC             	( 0x403c )
#define  REG_PIN_RFCTL36_MISC             	( 0x4040 )
#define  REG_PIN_RFCTL37_MISC             	( 0x4044 )
#define  REG_PIN_RFCTL22_MISC             	( 0x4048 )
#define  REG_PIN_GPIO164_MISC             	( 0x404c )
#define  REG_PIN_GPIO165_MISC             	( 0x4050 )
#define  REG_PIN_RFCTL25_MISC             	( 0x4054 )
#define  REG_PIN_RFCTL26_MISC             	( 0x4058 )
#define  REG_PIN_RFCTL27_MISC             	( 0x405c )
#define  REG_PIN_RFCTL28_MISC             	( 0x4060 )
#define  REG_PIN_RFCTL29_MISC             	( 0x4064 )
#define  REG_PIN_SCL2_MISC                	( 0x4068 )
#define  REG_PIN_SDA2_MISC                	( 0x406c )
#define  REG_PIN_MTCK_ARM_MISC            	( 0x4070 )
#define  REG_PIN_MTMS_ARM_MISC            	( 0x4074 )
#define  REG_PIN_XTL_EN0_MISC             	( 0x4078 )
#define  REG_PIN_PTEST_MISC               	( 0x407c )
#define  REG_PIN_AUD_DAD1_MISC            	( 0x4080 )
#define  REG_PIN_AUD_ADD0_MISC            	( 0x4084 )
#define  REG_PIN_AUD_ADSYNC_MISC          	( 0x4088 )
#define  REG_PIN_AUD_SCLK_MISC            	( 0x408c )
#define  REG_PIN_CHIP_SLEEP_MISC          	( 0x4090 )
#define  REG_PIN_CLK_32K_MISC             	( 0x4094 )
#define  REG_PIN_DCDC_ARM_EN_MISC         	( 0x4098 )
#define  REG_PIN_EXT_RST_B_MISC           	( 0x409c )
#define  REG_PIN_ADI_D_MISC               	( 0x40a0 )
#define  REG_PIN_ADI_SCLK_MISC            	( 0x40a4 )
#define  REG_PIN_XTL_EN1_MISC             	( 0x40a8 )
#define  REG_PIN_ANA_INT_MISC             	( 0x40ac )
#define  REG_PIN_AUD_DAD0_MISC            	( 0x40b0 )
#define  REG_PIN_AUD_DASYNC_MISC          	( 0x40b4 )
#define  REG_PIN_LCM_RSTN_MISC            	( 0x40b8 )
#define  REG_PIN_DSI_TE_MISC              	( 0x40bc )
#define  REG_PIN_PWMA_MISC                	( 0x40c0 )
#define  REG_PIN_EXTINT0_MISC             	( 0x40c4 )
#define  REG_PIN_EXTINT1_MISC             	( 0x40c8 )
#define  REG_PIN_SDA1_MISC                	( 0x40cc )
#define  REG_PIN_SCL1_MISC                	( 0x40d0 )
#define  REG_PIN_SIMCLK2_MISC             	( 0x40d4 )
#define  REG_PIN_SIMDA2_MISC              	( 0x40d8 )
#define  REG_PIN_SIMRST2_MISC             	( 0x40dc )
#define  REG_PIN_SIMCLK1_MISC             	( 0x40e0 )
#define  REG_PIN_SIMDA1_MISC              	( 0x40e4 )
#define  REG_PIN_SIMRST1_MISC             	( 0x40e8 )
#define  REG_PIN_SIMCLK0_MISC             	( 0x40ec )
#define  REG_PIN_SIMDA0_MISC              	( 0x40f0 )
#define  REG_PIN_SIMRST0_MISC             	( 0x40f4 )
#define  REG_PIN_SD2_CMD_MISC             	( 0x40f8 )
#define  REG_PIN_SD2_D0_MISC              	( 0x40fc )
#define  REG_PIN_SD2_D1_MISC              	( 0x4100 )
#define  REG_PIN_SD2_CLK_MISC             	( 0x4104 )
#define  REG_PIN_SD2_D2_MISC              	( 0x4108 )
#define  REG_PIN_SD2_D3_MISC              	( 0x410c )
#define  REG_PIN_SD0_D3_MISC              	( 0x4110 )
#define  REG_PIN_SD0_D2_MISC              	( 0x4114 )
#define  REG_PIN_SD0_CMD_MISC             	( 0x4118 )
#define  REG_PIN_SD0_D0_MISC              	( 0x411c )
#define  REG_PIN_SD0_D1_MISC              	( 0x4120 )
#define  REG_PIN_SD0_CLK_MISC             	( 0x4124 )
#define  REG_PIN_EMMC_CMD_MISC            	( 0x412c )
#define  REG_PIN_EMMC_D6_MISC             	( 0x4130 )
#define  REG_PIN_EMMC_D7_MISC             	( 0x4134 )
#define  REG_PIN_EMMC_CLK_MISC            	( 0x4138 )
#define  REG_PIN_EMMC_D5_MISC             	( 0x413c )
#define  REG_PIN_EMMC_D4_MISC             	( 0x4140 )
#define  REG_PIN_EMMC_DS_MISC             	( 0x4144 )
#define  REG_PIN_EMMC_D3_MISC             	( 0x414c )
#define  REG_PIN_EMMC_RST_MISC            	( 0x4150 )
#define  REG_PIN_EMMC_D1_MISC             	( 0x4154 )
#define  REG_PIN_EMMC_D2_MISC             	( 0x4158 )
#define  REG_PIN_EMMC_D0_MISC             	( 0x415c )
#define  REG_PIN_IIS0DI_MISC              	( 0x4160 )
#define  REG_PIN_IIS0DO_MISC              	( 0x4164 )
#define  REG_PIN_IIS0CLK_MISC             	( 0x4168 )
#define  REG_PIN_IIS0LRCK_MISC            	( 0x416c )
#define  REG_PIN_SD1_CLK_MISC             	( 0x4170 )
#define  REG_PIN_SD1_CMD_MISC             	( 0x4174 )
#define  REG_PIN_SD1_D0_MISC              	( 0x4178 )
#define  REG_PIN_SD1_D1_MISC              	( 0x417c )
#define  REG_PIN_SD1_D2_MISC              	( 0x4180 )
#define  REG_PIN_SD1_D3_MISC              	( 0x4184 )
#define  REG_PIN_CLK_AUX0_MISC            	( 0x4188 )
#define  REG_PIN_WIFI_COEXIST_MISC        	( 0x418c )
#define  REG_PIN_BEIDOU_COEXIST_MISC      	( 0x4190 )
#define  REG_PIN_U3TXD_MISC               	( 0x4194 )
#define  REG_PIN_U3RXD_MISC               	( 0x4198 )
#define  REG_PIN_U3CTS_MISC               	( 0x419c )
#define  REG_PIN_U3RTS_MISC               	( 0x41a0 )
#define  REG_PIN_U0TXD_MISC               	( 0x41a4 )
#define  REG_PIN_U0RXD_MISC               	( 0x41a8 )
#define  REG_PIN_U0CTS_MISC               	( 0x41ac )
#define  REG_PIN_U0RTS_MISC               	( 0x41b0 )
#define  REG_PIN_IIS1DI_MISC              	( 0x41b4 )
#define  REG_PIN_IIS1DO_MISC              	( 0x41b8 )
#define  REG_PIN_IIS1CLK_MISC             	( 0x41bc )
#define  REG_PIN_IIS1LRCK_MISC            	( 0x41c0 )
#define  REG_PIN_SPI0_CSN_MISC            	( 0x41c4 )
#define  REG_PIN_SPI0_DO_MISC             	( 0x41c8 )
#define  REG_PIN_SPI0_DI_MISC             	( 0x41cc )
#define  REG_PIN_SPI0_CLK_MISC            	( 0x41d0 )
#define  REG_PIN_U2TXD_MISC               	( 0x41d4 )
#define  REG_PIN_U2RXD_MISC               	( 0x41d8 )
#define  REG_PIN_U4TXD_MISC               	( 0x41dc )
#define  REG_PIN_U4RXD_MISC               	( 0x41e0 )
#define  REG_PIN_CMMCLK1_MISC             	( 0x41e4 )
#define  REG_PIN_CMRST1_MISC              	( 0x41e8 )
#define  REG_PIN_CMMCLK0_MISC             	( 0x41ec )
#define  REG_PIN_CMRST0_MISC              	( 0x41f0 )
#define  REG_PIN_CMPD0_MISC               	( 0x41f4 )
#define  REG_PIN_CMPD1_MISC               	( 0x41f8 )
#define  REG_PIN_SCL0_MISC                	( 0x41fc )
#define  REG_PIN_SDA0_MISC                	( 0x4200 )
#define  REG_PIN_SDA6_MISC                	( 0x4204 )
#define  REG_PIN_SCL6_MISC                	( 0x4208 )
#define  REG_PIN_U1TXD_MISC               	( 0x420c )
#define  REG_PIN_U1RXD_MISC               	( 0x4210 )
#define  REG_PIN_KEYOUT0_MISC             	( 0x4214 )
#define  REG_PIN_KEYOUT1_MISC             	( 0x4218 )
#define  REG_PIN_KEYOUT2_MISC             	( 0x421c )
#define  REG_PIN_KEYIN0_MISC              	( 0x4220 )
#define  REG_PIN_KEYIN1_MISC              	( 0x4224 )
#define  REG_PIN_KEYIN2_MISC              	( 0x4228 )
#define  REG_PIN_IIS3DI_MISC              	( 0x422c )
#define  REG_PIN_IIS3DO_MISC              	( 0x4230 )
#define  REG_PIN_IIS3CLK_MISC             	( 0x4234 )
#define  REG_PIN_IIS3LRCK_MISC            	( 0x4238 )
#define  REG_PIN_RFCTL0_MISC              	( 0x423c )
#define  REG_PIN_RFCTL1_MISC              	( 0x4240 )
#define  REG_PIN_RFCTL10_MISC             	( 0x4244 )
#define  REG_PIN_RFCTL11_MISC             	( 0x4248 )
#define  REG_PIN_RFCTL12_MISC             	( 0x424c )
#define  REG_PIN_RFCTL13_MISC             	( 0x4250 )
#define  REG_PIN_RFCTL14_MISC             	( 0x4254 )
#define  REG_PIN_RFCTL15_MISC             	( 0x4258 )
#define  REG_PIN_RFCTL16_MISC             	( 0x425c )
#define  REG_PIN_RFCTL17_MISC             	( 0x4260 )
#define  REG_PIN_RFCTL18_MISC             	( 0x4264 )
#define  REG_PIN_RFCTL19_MISC             	( 0x4268 )
#define  REG_PIN_RFCTL2_MISC              	( 0x426c )
#define  REG_PIN_EXTINT5_MISC             	( 0x4270 )
#define  REG_PIN_EXTINT6_MISC             	( 0x4274 )
#define  REG_PIN_EXTINT7_MISC             	( 0x4278 )
#define  REG_PIN_GPIO30_MISC              	( 0x427c )
#define  REG_PIN_GPIO31_MISC              	( 0x4280 )
#define  REG_PIN_GPIO32_MISC              	( 0x4284 )
#define  REG_PIN_GPIO33_MISC              	( 0x4288 )
#define  REG_PIN_GPIO34_MISC              	( 0x428c )
#define  REG_PIN_RFCTL3_MISC              	( 0x4290 )
#define  REG_PIN_RFCTL4_MISC              	( 0x4294 )
#define  REG_PIN_RFCTL5_MISC              	( 0x4298 )
#define  REG_PIN_RFCTL6_MISC              	( 0x429c )
#define  REG_PIN_RFCTL7_MISC              	( 0x42a0 )
#define  REG_PIN_GPIO15_MISC              	( 0x42a4 )
#define  REG_PIN_GPIO16_MISC              	( 0x42a8 )
#define  REG_PIN_RFFE0_SCK0_MISC          	( 0x42ac )
#define  REG_PIN_GPIO38_MISC              	( 0x42b0 )
#define  REG_PIN_RFFE0_SDA0_MISC          	( 0x42b4 )
#define  REG_PIN_GPIO39_MISC              	( 0x42b8 )
#define  REG_PIN_RFFE1_SCK0_MISC          	( 0x42bc )
#define  REG_PIN_GPIO181_MISC             	( 0x42c0 )
#define  REG_PIN_RFFE1_SDA0_MISC          	( 0x42c4 )
#define  REG_PIN_GPIO182_MISC             	( 0x42c8 )
#define  REG_PIN_RF_LVDS0_ADC_ON_MISC     	( 0x42cc )
#define  REG_PIN_RF_LVDS0_DAC_ON_MISC     	( 0x42d0 )
#define  REG_PIN_RFSCK0_MISC              	( 0x42d4 )
#define  REG_PIN_RFSDA0_MISC              	( 0x42d8 )
#define  REG_PIN_RFSEN0_MISC              	( 0x42dc )
#define  REG_PIN_RF_LVDS1_ADC_ON_MISC     	( 0x42e0 )
#define  REG_PIN_RF_LVDS1_DAC_ON_MISC     	( 0x42e4 )
#define  REG_PIN_RFSCK1_MISC              	( 0x42e8 )
#define  REG_PIN_RFSDA1_MISC              	( 0x42ec )
#define  REG_PIN_RFSEN1_MISC              	( 0x42f0 )
#define  REG_PIN_RFCTL38_MISC             	( 0x42f4 )
#define  REG_PIN_RFCTL39_MISC             	( 0x42f8 )


/* bits definitions for register REG_PIN_XXX */
#define BITS_PIN_DS(_x_)                ( ((_x_) << 19) & (BIT_19|BIT_20|BIT_21|BIT_22) )
#define BIT_PIN_SLP_AGDSP               ( BIT_16 )
#define BIT_PIN_SLP_TGLDSP              ( BIT_15 )
#define BIT_PIN_SLP_PUBCP               ( BIT_14 )
#define BIT_PIN_SLP_AP                  ( BIT_13 )
#define BIT_PIN_SLP_NONE		( (~(0xf << 13)) & (BIT_13|BIT_14|BIT_15|BIT_16) )
#define BITS_PIN_SLP(_x_)               ( ((_x_) << 13) & (BIT_13|BIT_14|BIT_15|BIT_16) )
#define BIT_PIN_WPU_SEL                 ( BIT_12 )
#define BIT_PIN_WPU                     ( BIT_7 )
#define BIT_PIN_WPD                     ( BIT_6 )
#define BITS_PIN_AF(_x_)                ( ((_x_) << 4) & (BIT_4|BIT_5) )
#define BIT_PIN_SLP_WPU                 ( BIT_3 )
#define BIT_PIN_SLP_WPD                 ( BIT_2 )
#define BIT_PIN_SLP_IE                  ( BIT_1 )
#define BIT_PIN_SLP_OE                  ( BIT_0 )

/* vars definitions for controller CTL_PIN */
#define BIT_PIN_NUL                     ( 0 )
#define BIT_PIN_SLP_NUL                 ( 0 )
#define BIT_PIN_SLP_Z                   ( 0 )
#define BIT_PIN_WPU_SEL                 ( BIT_12 )
#define BIT_PIN_WPUS                    ( BIT_12 )
#define BIT_PIN_NULL                    ( 0 )



#endif //_PINMAP_H_

